Please use this identifier to cite or link to this item:
https://lib.hpu.edu.vn/handle/123456789/29817
Title: | Nano-CMOS gate dielectric engineering |
Authors: | Wong, Hei |
Keywords: | Nano-CMOS Nano Nano technologies |
Issue Date: | 2012 |
Publisher: | CRC Press |
Abstract: | Content: Machine generated contents note: 1.Overview of CMOS Technology. 1.1.Introduction. 1.2.MOS Transistor: A Quick Introduction to Classical Models. 1.2.1.Current-Voltage Characteristics. 1.2.2.Threshold Voltage. 1.3.Short-Channel Effects and Short-Channel Modifications. 1.3.1.Effect on I-V Characteristics. 1.3.2.Subthreshold Conduction. 1.3.3.Short-Channel Effects. 1.3.3.Threshold Voltage Roll-Off. 1.3.4.Drain-Induced Barrier Lowering (DIBL). 1.3.5.Gate Leakage Current. 1.3.5.1.Direct-Tunneling. 1.3.5.2.Fowler-Nordheim Tunneling. 1.3.5.3.Poole-Frenkel Emission and Trap-Assisted Tunneling. 1.4.Features and Uniqueness of MOS Transistor. 1.5.MOS in Deca-Nanometer. |
URI: | https://lib.hpu.edu.vn/handle/123456789/29817 |
ISBN: | 9781439849590 1439849595 |
Appears in Collections: | Technology |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Nano-CMOS-gate-dielectric-engineering-579.pdf Restricted Access | 10.74 MB | Adobe PDF | View/Open Request a copy |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.