Please use this identifier to cite or link to this item: https://lib.hpu.edu.vn/handle/123456789/29817
Full metadata record
DC FieldValueLanguage
dc.contributor.authorWong, Heien_US
dc.date.accessioned2018-03-20T07:28:00Z
dc.date.available2018-03-20T07:28:00Z
dc.date.issued2012en_US
dc.identifier.isbn9781439849590en_US
dc.identifier.isbn1439849595en_US
dc.identifier.otherHPU1160571en_US
dc.identifier.urihttps://lib.hpu.edu.vn/handle/123456789/29817-
dc.description.abstractContent: Machine generated contents note: 1.Overview of CMOS Technology. 1.1.Introduction. 1.2.MOS Transistor: A Quick Introduction to Classical Models. 1.2.1.Current-Voltage Characteristics. 1.2.2.Threshold Voltage. 1.3.Short-Channel Effects and Short-Channel Modifications. 1.3.1.Effect on I-V Characteristics. 1.3.2.Subthreshold Conduction. 1.3.3.Short-Channel Effects. 1.3.3.Threshold Voltage Roll-Off. 1.3.4.Drain-Induced Barrier Lowering (DIBL). 1.3.5.Gate Leakage Current. 1.3.5.1.Direct-Tunneling. 1.3.5.2.Fowler-Nordheim Tunneling. 1.3.5.3.Poole-Frenkel Emission and Trap-Assisted Tunneling. 1.4.Features and Uniqueness of MOS Transistor. 1.5.MOS in Deca-Nanometer.en_US
dc.format.extent242 p.en_US
dc.format.mimetypeapplication/pdfen_US
dc.language.isoenen_US
dc.publisherCRC Pressen_US
dc.subjectNano-CMOSen_US
dc.subjectNanoen_US
dc.subjectNano technologiesen_US
dc.titleNano-CMOS gate dielectric engineeringen_US
dc.typeBooken_US
dc.size10,737 KBen_US
dc.departmentTechnologyen_US
Appears in Collections:Technology

Files in This Item:
File Description SizeFormat 
Nano-CMOS-gate-dielectric-engineering-579.pdf
  Restricted Access
10.74 MBAdobe PDFThumbnail
View/Open Request a copy


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.