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dc.contributor.authorJeffers, Jamesen_US
dc.contributor.authorReinders, Jamesen_US
dc.date.accessioned2018-04-24T03:52:13Z
dc.date.available2018-04-24T03:52:13Z
dc.date.issued2013en_US
dc.identifier.isbn0124104142en_US
dc.identifier.isbn9780124104143en_US
dc.identifier.otherHPU5161371en_US
dc.identifier.urihttps://lib.hpu.edu.vn/handle/123456789/30542
dc.description.abstractAuthors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.en_US
dc.format.extent430 p.en_US
dc.format.mimetypeapplication/pdfen_US
dc.language.isoenen_US
dc.publisherMorgan Kaufmann Publishersen_US
dc.subjectIntel Xeon Phien_US
dc.subjectAlgorithms and Data Structuresen_US
dc.subjectProgrammingen_US
dc.titleIntel Xeon Phi Coprocessor High Performance Programmingen_US
dc.typeBooken_US
dc.size15,583 KBen_US
dc.departmentTechnologyen_US


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