Nano-CMOS and post-CMOS electronics : circuits and design, Volume 2

Abstract

Continuing from volume 1, this volume outlines circuit- and system-level design approaches and issues for these devices. Topics covered include self-healing analog/RF circuits. on-chip gate delay variability measurement in scaled technology. FinFET SRAM circuits. nanoscale FinFET devices for PVT aware SRAM. low leakage variability aware CMOS logic circuits. thermal effects in MWCNT VLSI interconnects. an accurate PVT-aware statistical logic library for nano-CMOS integrated circuits. SPICEless RTL design optimization of nano-electronic digital integrated circuits. power-delay trade-off driven optimal scheduling of CDFGs during high level synthesis. green on-chip inductors for three-dimensional integrated circuits. 3D NoC - a promising alternative for tomorrow’s nano-system design. and DNA computing.