Nano-CMOS gate dielectric engineering

dc.contributor.author	Wong, Hei	en_US
dc.date.accessioned	2018-03-20T07:28:00Z
dc.date.available	2018-03-20T07:28:00Z
dc.date.issued	2012	en_US
dc.identifier.isbn	9781439849590	en_US
dc.identifier.isbn	1439849595	en_US
dc.identifier.other	HPU1160571	en_US
dc.identifier.uri	https://lib.hpu.edu.vn/handle/123456789/29817
dc.description.abstract	Content: Machine generated contents note: 1.Overview of CMOS Technology. 1.1.Introduction. 1.2.MOS Transistor: A Quick Introduction to Classical Models. 1.2.1.Current-Voltage Characteristics. 1.2.2.Threshold Voltage. 1.3.Short-Channel Effects and Short-Channel Modifications. 1.3.1.Effect on I-V Characteristics. 1.3.2.Subthreshold Conduction. 1.3.3.Short-Channel Effects. 1.3.3.Threshold Voltage Roll-Off. 1.3.4.Drain-Induced Barrier Lowering (DIBL). 1.3.5.Gate Leakage Current. 1.3.5.1.Direct-Tunneling. 1.3.5.2.Fowler-Nordheim Tunneling. 1.3.5.3.Poole-Frenkel Emission and Trap-Assisted Tunneling. 1.4.Features and Uniqueness of MOS Transistor. 1.5.MOS in Deca-Nanometer.	en_US
dc.format.extent	242 p.	en_US
dc.format.mimetype	application/pdf	en_US
dc.language.iso	en	en_US
dc.publisher	CRC Press	en_US
dc.subject	Nano-CMOS	en_US
dc.subject	Nano	en_US
dc.subject	Nano technologies	en_US
dc.title	Nano-CMOS gate dielectric engineering	en_US
dc.type	Book	en_US
dc.size	10,737 KB	en_US
dc.department	Technology	en_US