Please use this identifier to cite or link to this item: http://lib.hpu.edu.vn/handle/123456789/30542
Title: Intel Xeon Phi Coprocessor High Performance Programming
Authors: Jeffers, James
Reinders, James
Keywords: Intel Xeon Phi
Algorithms and Data Structures
Programming
Issue Date: 2013
Publisher: Morgan Kaufmann Publishers
Abstract: Authors Jim Jeffers and James Reinders spent two years helping educate customers about the prototype and pre-production hardware before Intel introduced the first Intel Xeon Phi coprocessor. They have distilled their own experiences coupled with insights from many expert customers, Intel Field Engineers, Application Engineers and Technical Consulting Engineers, to create this authoritative first book on the essentials of programming for this new architecture and these new products. This book is useful even before you ever touch a system with an Intel Xeon Phi coprocessor. To ensure that your applications run at maximum efficiency, the authors emphasize key techniques for programming any modern parallel computing system whether based on Intel Xeon processors, Intel Xeon Phi coprocessors, or other high performance microprocessors. Applying these techniques will generally increase your program performance on any system, and better prepare you for Intel Xeon Phi coprocessors and the Intel MIC architecture.
URI: https://lib.hpu.edu.vn/handle/123456789/30542
ISBN: 0124104142
9780124104143
Appears in Collections:Technology

Files in This Item:
File Description SizeFormat 
Intel-Xeon-Phi-1371.pdf
  Restricted Access
15.58 MBAdobe PDFThumbnail
View/Open Request a copy


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.